POP (Package-On-Package) is formed by vertically stacking a plurality of semiconductor packages to manufacture a 3D stacked assembly where the top semiconductor package is mounted on the bottom semiconductor package by SMT (Surface Mounting). The vertically electrical interconnection between the stacked packages is connected by a plurality of upper solder balls of the top semiconductor package with ball-on-ball interconnection where a POP stacking gap is inevitable. Moreover, an encapsulant of the bottom semiconductor package is formed on a chip carrier substrate where a molding height is added and the peripheries of the encapsulant encapsulate a plurality of interposer solder balls as vertically electrical interconnection elements. Before encapsulation, the interposer solder balls are disposed on a bottom substrate of the bottom semiconductor package by ball placement processes. After encapsulation, part surfaces of the interposer solder balls are exposed from the encapsulant by laser drill process or grinding process. During POP stacked assembly, the upper solder balls of the top semiconductor package are physically and electrically connected to the exposed surfaces of the encapsulated interposer solder balls of the bottom semiconductor package where the number and the layout of the vertically interconnection elements are limited by the diameters and the pitches of the encapsulated solder balls.
As shown in FIG. 1, a conventional bottom semiconductor package 300 implemented in POP stacked assembly comprises an encapsulant 310, a plurality of filled solder pastes 320, a chip 330, a substrate 340, and a plurality of solder balls 390. The substrate 340 has multi-layer of circuitry with a plurality of plated through holes 343 in substrate core. The chip 330 is bonded onto and electrically connected to the top surface 342 of the substrate 340 by a plurality of bumps 331 using flip-chip bonding technology. The encapsulant 310 is formed on the top surface 342 of the substrate 340 to encapsulate the chip 330. A plurality of through mold holes 311 (TMV) are disposed at the peripheries of the encapsulant 310 by drilling where the TMVs 311 penetrate through the encapsulant 310 to expose the peripheral pads of the substrate 340. The filled solder pastes 320 are then disposed inside the TMVs 311 for solder balls interconnections of POP stacked assembly. Even reflowing, the filled solder pastes 320 can not be shaped as solder balls under the limitation of the TMVs 311, but the fabrication of the TMVs 311 is difficult. The solder balls 390 are disposed on the bottom surface 341 of the substrate 340. In a more advanced POP stacked assembly, the bottom semiconductor package with a thinner package height, a smaller stacking gap, and a smaller package footprint with smaller pitches of vertically interconnection is expected.